Feature: ['<b>Price For:</b> Each <b>Chip Density (bit)</b>: 18M <b>Number of Words</b>: 512K <b>Number of Bits/Word (bit)</b>: 36 <b>Architecture</b>: Pipelined <b>Data Rate Architecture</b>: QDR <b>Address Bus Width (bit)</b>: 17 <b>Number of Ports</b>: 2 <b>Timing Type</b>: Synchronous <b>Max. Access Time (ns)</b>: 0.45 <b>Maximum Clock Rate (MHz)</b>: 450 <b>Minimum Operating Supply Voltage (V)</b>: 1.7 <b>Typical Operating Supply Voltage (V)</b>: 1.8', 'New and Original'] (Page 1)