Key ^ | Value |
---|---|
@IOH (test), @Iol (A) | 8.0m |
Case | Standard |
Configurable Logic Blocks | 96 |
Digital Input V Max (V) | 7.5 |
Gate Capacity | 1000 |
Inp Curr. Logic 0 | 0.8 |
JEDEC Std 30 Outline Code | S-CPGA-P |
Manufacturer | CYP |
No. of Pins, Pinout Equivalence Number | N/A |
Nom. Pos. Supp | 5 |
Number of User I/Os | 56 |
Oper. Temp (?C) Max. | 70 |
Oper. Temp (?C) Min | 0 |
Package Body Material | Ceramic |
SKU | 1155096 |
Surface Mounted Yes/No | NO |
Tech. | CMOS Integrated Circuit |
Type | Semiconductor |
VIH Min. (CMOS) | 2.0 |
VOH Min. | 2.4 |
VOL Max. | 0.4 |
Vsup (+) Maximum (V) | 7.0 |