| Access Time-Max | 500 ps |
| Additional Feature | PIPELINED ARCHITECTURE |
| Clock Frequency-Max (fCLK) | 133 MHz |
| I/O Type | SEPARATE |
| JESD-30 Code | R-PBGA-B165 |
| JESD-609 Code | e0 |
| Length | 15 mm |
| Manufacturer | Cypress Semiconductor |
| Manufacturer Part Number | CY7C1312AV18-133BZC |
| Memory Density | 18.8744 Mbit |
| Memory IC Type | QDR SRAM |
| Memory Width | 18 |
| Number of Functions | 1 |
| Number of Terminals | 165 |
| Number of Words | 1.0486 M |
| Number of Words Code | 1000000 |
| Operating Mode | SYNCHRONOUS |
| Operating Temperature-Max | 70 ?C |
| Operating Temperature-Min | 0 ?C |
| Organization | 1MX18 |
| Output Characteristics | 3-STATE |
| Package Body Material | PLASTIC/EPOXY |