| Additional Feature | REGISTER PRELOAD; POWER-UP RESET |
| Architecture | PAL-TYPE |
| Clock Frequency-Max | 45.5 MHz |
| JESD-30 Code | R-PDIP-T24 |
| JESD-609 Code | e0 |
| Length | 31.75 mm |
| Manufacturer | Lattice Semiconductor Corporation |
| Manufacturer Part Number | GAL20V8B-15LPI |
| Number of Dedicated Inputs | 12 |
| Number of I/O Lines, Number of Outputs | 8 |
| Number of Inputs | 20 |
| Number of Product Terms | 64 |
| Number of Terminals | 24 |
| Operating Temperature-Max | 85 ?C |
| Operating Temperature-Min | -40 ?C |
| Organization | 12 DEDICATED INPUTS, 8 I/O |
| Output Function | MACROCELL |
| Package Body Material | PLASTIC/EPOXY |
| Package Code | DIP |
| Package Description | DIP, DIP24,.3 |
| Package Equivalence Code | DIP24,.3 |